Senior AMS Design Engineer Position Available In Middlesex, Massachusetts

Location:

Cambridge, MA Salary:

$150,000.00 USD Annually – $180,000.00

USD Annually Description:

We are looking for a Senior Analog/Mixed Signal ASIC Design Engineer to join our Silicon Architecture Group . In this role, you will lead end-to-end integrated circuit design -from conceptual development through implementation, verification, and delivery. You will play a pivotal role in architecting, modeling, and optimizing mixed-signal ASICs , ensuring efficient designs that balance analog and digital trade-offs . This job will have the following responsibilities: Develop chip-level and block-level requirements aligned with customer needs. Design and simulate circuits using MATLAB, Simulink, SystemVerilog , and other functional modeling tools. Lead multidisciplinary design teams , ensuring clear communication and technical leadership. Drive technical project planning , contributing to business development initiatives . Optimize performance, power, and cost through detailed architecture analysis. Evaluate hardware feasibility for complex algorithms and requirements . Independently develop chip architectures and designs , navigating ambiguous requirements. Provide mentorship by documenting and teaching best practices to junior engineers. Oversee physical layout , floor planning, and post-layout parasitic simulations.

Qualifications & Requirements:

Bachelor’s degree in Electrical Engineering or related field (Master’s preferred). 5-7 years of experience with a bachelor’s degree, 3-5 years with a master’s, or 0-2 years with a PhD in ASIC Hardware Engineering or related. Proficiency in integrated circuit design and understanding of semiconductors and computer architecture . Ability to write detailed design specifications and manage small technical teams . Strong skills in analytical problem-solving, organization, and time management . Excellent verbal and written communication skills. Expertise in Cadence Virtuoso or equivalent mixed-signal design tools . Proficiency in SystemVerilog, SV-RNM, Verilog-AMS for mixed-signal modeling and verification. Experience in scripting (Python, SKILL) to automate design, verification, and test flows. Previous chip-level design experience for tape-out projects. Ability to obtain and maintain a government security clearance (U.S. citizenship required). By providing your phone number, you consent to: (1) receive automated text messages and calls from the Judge Group, Inc. and its affiliates (collectively “Judge”) to such phone number regarding job opportunities, your job application, and for other related purposes. Message & data rates apply and message frequency may vary. Consistent with Judge’s Privacy Policy, information obtained from your consent will not be shared with third parties for marketing/promotional purposes. Reply STOP to opt out of receiving telephone calls and text messages from Judge and HELP for help.

Contact:

zbossi@judge.com This job and many more are available through The Judge Group. Find us on the web at www.judge.com