Cleared FPGA Design Engr Position Available In Camden, New Jersey

Seeking a Senior FPGA Design Engineer to architect and implement FPGA solutions for defense applications using VHDL, Vivado, and advanced EDA toolchains.

Job Requirements:

Bachelor�s, Master�s, or PhD in Engineering, Computer Science, or related technical field (Physics, Mathematics, Data Science, etc.) 3�5+ years of FPGA design experience using VHDL Experience with Xilinx FPGAs and Vivado toolchain Proficient with revision control systems Experience with Earned Value Management (EVM) Hands-on experience with Ethernet, I2C, SPI, AXI protocols

Preferred Skills:

Experience mapping algorithms to digital architectures Proficient in C++ (Object-Oriented Programming) Familiarity with Ethernet, TCP/IP, PCIe, NVMe, USB protocols Experience with Xilinx SoC design using SDKs and PetaLinux Experience with High-Level Synthesis tools such as

Vivado HLX or Mentor Catapult Job Responsibilities:

Derive FPGA design specifications from system-level requirements Develop FPGA architecture and implement in RTL using VHDL Conduct module-level simulations, synthesis, placement and routing, and static timing analysis Perform RTL quality checks using Lint, RDC, CDC, and static formal tools Generate verification test plans and perform full simulations Support board-level bring-up and FPGA validation Validate functionality through hardware/software integration testing Develop and maintain product collateral to support NSA certification Utilize tools such as Questa Prime, UVM, QVIPs, Synopsys DC/Primetime, and vendor-specific toolchains (Vivado, Libero, Quartus) Contribute to a multi-vendor FPGA and ASIC front-end design environment

Pay Details:

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