ASIC/FPGA Engineer Position Available In Camden, New Jersey

Responsible for architecture, implementation, and verification/validation of complex FPGA and/or ASIC systems supporting high-throughput, cryptographic communication solutions.

Job Requirements:

Minimum 3 years of experience implementing complex algorithms targeting ASICs/FPGAs Bachelor�s degree in Electrical Engineering or Computer Science (Master�s preferred) Proficiency in VHDL for cryptographic algorithm implementation Experience with FPGA design and debug using Xilinx/Vivado tools Familiarity with high-speed protocols such as NVMe, PCIe, SRIOV, 10G�400G Ethernet, TCP/IP US Citizenship Active SECRET clearance

Preferred Skills:

Experience with High Level Synthesis (HLS), particularly Vivado HLS Embedded software development in C++ with Object-Oriented Programming principles Familiarity with System Verilog Assertions (SVA) and UVM testbenches Experience with Synopsys, Mentor Questa, and Xilinx/Intel/Microchip EDA toolchains Knowledge of Clock Domain Crossing (CDC) and VIPs for verification

Job Responsibilities:

Design

FPGA/ASIC

architecture supporting cryptographic and high-speed protocol requirements Implement and validate FPGA designs targeting ARM SoCs (e.g., Xilinx MPSOC) Develop and debug UVM-based simulation testbenches using System Verilog Perform software-driven validation using C++ on Linux-based evaluation boards Integrate IP blocks and manage EDA tool flows for synthesis, simulation, and verification Collaborate with cross-functional teams to ensure delivery of secure, robust communication products for national security initiatives

Pay Details:

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