Principal Engineer- ASIC Design (PEAD-DVRM) Position Available In Suffolk, New York

Design micro-architecture of DMA engine used to transmit data between Ethernet and PCIe. Work with verification team to resolve questions or bugs from DMA design. Work with FPGA validation team to resolve timing issues or bugs found in DMA design. Discuss with Design, Architect and Software Development Teams at the initial phase of the project to check the feasibility and ensure that all the requirements are met. Coordinate with the Design team, Verification team, and Validation Team to ensure the quality of the project during the Project Development phase. Close interaction with the Implementation and Place and Routing team to bring up the developed project to ASIC chip. Implement the Designed project to meet the Design Objective Specification. Bring up the Project in FPGA Platform. Address the Various issues reported by the Verification, Validation, SW development and Implementation Teams. Document the Design Micro Architecture, Ticket Tracking, Effort assessment periodic document and Project Postmortem documentation. Coordinate team members, setting clear team goals, overseeing day-to-day operation, discovering training needs, and providing coaching.

EDUCATION & EXPERIENCE

Bachelor’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Computer Engineering, or related field, followed by 5 years of progressive, related experience.

HOW TO APPLY

Email resume to Microchip Technology at Danielle.

Weiskopf@microchip.com. Must list job title & code in subject line.

Minimum Salary:

165942

Maximum Salary:

165942

Salary Unit:

Yearly